DESIGN OF HIGH SPEED AREA OPTIMIZED BINARY CODED DECIMAL DIGIT ADDER
نویسندگان
چکیده
منابع مشابه
Design of High Speed Area Optimized Binary Coded Decimal Digit Adder and Multiplier
Decimal arithmetic is very important for computations in financial and commercial transactions which include banking system, tax calculation, billing etc. Decimal arithmetic algorithm mainly includes decimal addition and multiplication. The main problem in the existing decimal arithmetic is the need for correcting the result as it is in the binary form. This causes the implementation area to be...
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With the growing popularity of decimal computer arithmetic in scientific, commercial, financial and Internet-based applications, hardware realisation of decimal arithmetic algorithms is gaining more importance. Hardware decimal arithmetic units now serve as an integral part of some recently commercialised general purpose processors, where complex decimal arithmetic operations, such as multiplic...
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Fast multipliers are essential parts of digital signal processing systems. The speed of multiply operation is of great importance in digital signal processing as well as in the general purpose processors. Now a days, there are an increasing number of portable applications requiring small-area, low power and high throughput circuitry. The circuits with low power consumption become the major issu...
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Among the emerging technologies recently proposed as alternatives to the classic CMOS, Quantum-dot cellular automata (QCA) is one of the most promising solutions to design area efficient and very high speed digital circuits. As transistors decrease in size more and more of them can be accommodated in a single die, thus increasing chip computational capabilities. However, transistors cannot get ...
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ژورنال
عنوان ژورنال: International Journal of Research in Engineering and Technology
سال: 2014
ISSN: 2321-7308,2319-1163
DOI: 10.15623/ijret.2014.0315073